Senior Lead Engineer - SoC Design

About the role

NXP is hiring a Senior Lead Engineer in Noida for high-performance digital logic design and SoC integration work. The role covers building subsystems and integrating SoC RTL, running the full SoC design flow and driving issues to closure.

Key responsibilities

• Build subsystems and perform SoC RTL integration
• Perform LINT/CDC/RDC sign-offs for the highest design quality
• Run the full SoC design flow from high-level design to synthesis
• Conduct IP integration reviews and BE report reviews for concurrent engineering
• Drive issues to closure and communicate clearly on written and verbal matters

Required profile

• Master's or Bachelor's degree in Electrical or Electronic Engineering
• 6-10 years of experience in high-performance digital logic design and SoC integration using ARM cores, bus protocols and interconnects
• Experience with low-power design techniques is desirable; ISO 26262-based functional safety microcontroller architectures are preferred

Required skills

• SoC RTL integration and design flow
• LINT, CDC, RDC sign-offs
• Synopsys VCS or Cadence RTL simulator, Design Compiler or RTL Compiler (Genus)
• Verdi debugging tool
• Creative problem-solving and logical breakdown of complex problems