Senior Emulation Engineer

About the role

At EnCharge AI we are building the next generation of AI compute silicon – purpose‑built for high‑performance, low‑power, and scalable AI inference. As a Senior Emulation Engineer you will play a critical role in validating complex AI accelerator architectures on emulation platforms before tape‑out.

Key responsibilities

• Set up and maintain Siemens Veloce emulation and prototyping platforms.
• Adapt SoC designs for emulation and prototyping.
• Develop and debug emulation testbenches and system‑level environments.
• Support pre‑silicon validation, power/performance analysis, and early software bring‑up, and participate in silicon bring‑up and validation.
• Collaborate with design and verification teams to isolate design issues and accelerate debug.
• Optimize performance of emulation workloads and reduce turnaround time.
• Work with firmware/software teams to enable use of emulators for OS and driver testing.

Required profile

• BS/MS/Ph.D. in EE, CS, or related field with 7+ years of SoC design experience.
• Experience with emulation platforms (Veloce, Palladium, ZeBu) and FPGA‑based prototyping systems (proFPGA, HAPS, Protium).
• Experience emulating high‑speed I/O interfaces such as PCIe, UCIe and memory technologies such as LPDDR and HBM.
• Solid understanding of digital design, RTL (Verilog/SystemVerilog), and SoC architecture.
• Proficiency with hardware debug tools, waveform viewers, and logic analyzers.
• Scripting skills (Python, Tcl, Perl) for automation and infrastructure development.
• Familiarity with UVM, simulation, and testbench environments; SystemVerilog and UVM verification experience a plus.
• Hands‑on software development experience with C/C++ is a plus.

Required skills

• Siemens Veloce
• Palladium
• ZeBu
• proFPGA
• HAPS
• Protium
• PCIe
• UCIe
• LPDDR
• HBM
• Verilog
• SystemVerilog
• UVM
• Python
• Tcl
• Perl
• C
• C++