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ASIC Verification Engineer (EEJ 2026)

Bosch Group · bengaluru

New
Senior 🇬🇧 English
UVM OVMS Metric-driven Verification Formal Verification Functional coverage Cadence Synopsys Mentor Perl TCL AMBA protocols VHDL Verilog

Job description

About the role

Bosch is looking for an experienced ASIC Verification Engineer to join its Bengaluru team. You will be responsible for verifying complex automotive ASICs, SoCs and IP blocks using industry‑leading methodologies and tools.

Key responsibilities

  • Verify SoCs, automotive ASICs, subsystems and IPs using Metric‑driven Verification (MDV) and/or Formal Verification.
  • Develop and track verification plans and create verification environments from scratch.
  • Design and integrate Verification‑IP (VIP) components and measure regression results.
  • Continuously improve verification methods, tools, flows and processes together with EDA partners.

Required profile

  • 5‑10 years of experience in digital RTL verification with SystemVerilog and UVM.
  • Strong knowledge of constrained‑random verification, functional coverage development and analysis.
  • Hands‑on experience with Cadence, Synopsys and Mentor verification tools.
  • Familiarity with configuration‑management, bug‑tracking tools and scripting languages such as Perl and TCL.
  • Good experience with AMBA protocols and ARM‑based subsystem/SoC verification.
  • Participation in at least one ASIC/SoC tape‑out; BE/B.Tech/ME/M.Tech in Electronics & Communication.

Required skills

  • SystemVerilog
  • UVM / OVMS
  • Metric‑driven Verification (MDV)
  • Formal Verification (desirable)
  • Functional coverage creation and analysis
  • Cadence, Synopsys, Mentor tools
  • Perl, TCL scripting
  • AMBA protocol knowledge
  • ARM subsystem verification
  • VHDL / Verilog

Questions fréquentes

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Source : ats:smartrecruiters

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Published 13 hours ago

Expires 1 month from now

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Bosch Group

bengaluru