SoC Design Implementation Engineer

About the role

Qualcomm is seeking a SoC Design Implementation Engineer to join its hardware engineering team in India. The role focuses on planning, designing, optimizing, verifying, and testing electronic systems that power next‑generation products.

Key responsibilities

• Perform RTL synthesis to achieve optimal performance, power, and area.
• Insert DFT features such as MBIST and Scan, set up timing constraints for functional and test modes, and run validation.
• Execute static low‑power checks on gate‑level netlists and verify logic equivalency between RTL and gate representations.
• Conduct static timing analysis, manage ECO flows, and achieve timing closure in collaboration with design, DFT, and product development teams.
• Debug timing constraints and perform sanity checks using STA tools.

Required profile

• Bachelor’s degree in Computer Science, Electrical/Electronics Engineering, or related field with at least 4 years of hardware engineering experience, or higher degrees with proportionally fewer years.
• Proven experience in RTL synthesis, DFT insertion, low‑power analysis, and timing closure.
• Ability to work with cross‑functional teams and meet performance requirements.

Required skills

• RTL synthesis
• Design‑for‑Test (MBIST, Scan)
• Static low‑power analysis
• Logic equivalency checking
• Static Timing Analysis (STA) tools
• ECO flow management
• Timing constraint debugging
• FPGA and DSP system knowledge