SOC Design Implementation Engineer – Hardware Design

About the role

Qualcomm is seeking a SOC Design Implementation Engineer to plan, design, optimize, verify, and test electronic systems for cutting‑edge products. The role involves working on digital, analog, RF, and optical designs, as well as FPGA and DSP implementations, collaborating with cross‑functional teams to meet performance targets.

Key responsibilities

• Perform RTL synthesis to achieve optimal performance, power, and area.
• Insert DFT features such as MBIST and scan, and set up timing constraints for functional and test modes.
• Run static low‑power checks on gate‑level netlists.
• Verify logic equivalency between RTL and gate representations.
• Execute static timing analysis, ECO flows, and achieve timing closure in partnership with design, DFT, and PD teams.
• Conduct timing analysis using STA tools and perform constraint debugging and sanity checks.

Required profile

• Bachelor’s degree in Computer Science, Electrical/Electronics Engineering or related field with at least 2 years of hardware engineering experience.
• Master’s degree in a relevant field with at least 1 year of hardware engineering experience.
• PhD in a relevant field with relevant hardware engineering experience.

Required skills

• RTL synthesis
• DFT insertion (MBIST, scan)
• Low‑power verification
• Logic equivalency checking
• Static timing analysis (STA)
• ECO flow management
• Timing analysis tools and constraint debugging