Senior DFT Engineer

About the role

Analog Devices is looking for a skilled and experienced DFT Engineer to join its VLSI design team. The role covers Design for Testability (DFT) techniques such as LBIST, ATPG, DFT DRC, MBIST, Boundary Scan, JTAG and Analog/PHY DFT, working with the design, verification and physical design teams.

Key responsibilities

• Collaborate with the design team to ensure efficient and effective testability of complex integrated circuits.
• Design and implement DFT features such as scan chains, compression and built-in self-test structures.
• Run DFT DRC checks in the RTL/Netlist database against DFT guidelines and rules.
• Use Siemens DFT tools to analyse designs and optimise testability metrics.
• Generate high-quality manufacturing ATPG test patterns for stuck-at and transition faults using on-chip test compression.
• Design MBIST (including repair) and verify it with Siemens EDA tools; validate DFT structures and patterns in RTL and netlist with and without SDF.
• Work with verification to define and implement DFT verification plans, and with physical design on DFT constraints for synthesis and STA.
• Analyse and debug test failures with the test engineering team, and mentor junior DFT engineers.

Required profile

• Bachelor's or Master's degree in Electrical/Electronic Engineering or a related field.
• 3-8 years of hands-on experience in DFT methodologies and techniques.
• Strong knowledge of LBIST, ATPG, DFT DRC, scan compression, low-power DFT, MBIST, boundary scan, analog DFT, JTAG architecture and DFT STA constraint development.
• Solid understanding of digital design fundamentals, RTL coding, lint/CDC, low-power checks and ASIC design flow.
• Excellent problem-solving skills, teamwork and communication skills.

Required skills

• Hands-on experience with Siemens DFT EDA tools for scan stitching, DRC, ATPG, coverage improvement, MBIST and boundary scan.
• Scripting in Perl, Tcl and/or Python for automation.
• Export licensing review may be required for non-US citizens and permanent residents.