Senior Staff Verification Engineer

About the role

Senior Staff Verification Engineer position is your opportunity to join one of the industry’s leading companies in Smart Edge SoCs for network/systems control, management security systems, and IIoT. You will work on RTL SoC/Subsystem verification of ARM‑based CPUs using industry‑standard methodologies such as UVM, Portable Stimulus and Formal verification.

Key responsibilities

• Lead test‑plan definition, micro‑architecture design verification, RTL verification, performance, power and use‑case verification, and support test‑program development through chip validation to production maturity.
• Collaborate with firmware, software, DV, FPGA, DFT, SoC integration and backend teams across all ASIC development stages.

Required profile

• 10+ years of SOC verification and UVM environment development with ARM processors (U85/U65/M55).
• Proficient in test‑plan definition and testcase development in C, Assembly and SystemVerilog.
• Expertise in RTL and gate‑level simulation, coverage analysis, performance and use‑case verification.
• Experience in functional test‑vector development and post‑silicon bring‑up/debug.
• Fluency with scripting languages such as Perl, Python and Shell.
• Preferred knowledge of Power‑Aware verification.

Required skills

• UVM verification methodology
• ARM processor families (U85, U65, M55)
• SystemVerilog, C, Assembly
• RTL and gate‑level simulation
• Coverage, performance and use‑case verification
• Functional test‑vector creation and post‑silicon debug
• Perl, Python, Shell scripting
• Portable Stimulus and Formal verification flows
• Power‑Aware verification (preferred)