Senior Verification Engineer – Mobile DRAM

About the role

Micron Technology is seeking a Senior Verification Engineer to lead end‑to‑end verification of advanced mobile DRAM designs such as DDR5, LPDDR5, DDR6 and LPDDR6. The role involves full‑chip gate‑level analysis, low‑power technology verification, and collaboration with global design teams.

Key responsibilities

• Guide verification strategy and set direction for DRAM projects.
• Develop and run test cases, stimuli, and test benches to increase functional coverage.
• Perform gate‑level simulations, timing analysis, and debug pre‑silicon designs.
• Co‑develop verification methodologies and environments using UVM and SystemVerilog.
• Identify verification bottlenecks suitable for AI‑based automation and work with cross‑functional teams to implement solutions.

Required profile

• 4–8 years of experience in memory verification (DRAM/ SRAM) and gate‑level simulation.
• Bachelor’s or postgraduate degree in Electronics Engineering or a related field.
• Strong analytical skills for complex CMOS and circuit designs.
• Effective communication and teamwork abilities across global locations.

Required skills

• SystemVerilog and Verilog simulation expertise.
• UVM test‑bench development.
• PLI coding experience.
• Gate‑level simulation with delay modeling.
• Setup/Hold and critical path timing analysis.
• Use of AI‑assisted verification tools.
• Familiarity with DRAM architectures and low‑power technologies.