Physical Design Methodology Lead

About the role

We are looking for a senior Flow and Methodology Engineer to lead backend design automation for advanced‑node SoC and ASIC projects. The role drives the creation, validation, and production support of robust RTL‑to‑GDS flows.

Key responsibilities

• Own and continuously improve backend implementation flows (synthesis, floorplanning, placement, CTS, routing, timing closure, power grid, extraction, verification).
• Partner with design, DFT, verification, timing, low‑power, package, foundry and sign‑off teams to meet tape‑out requirements.
• Lead initiatives from concept through prototype, benchmarking, documentation, deployment, training and production support.
• Establish best‑practice reference flows, automation frameworks, dashboards and metrics to improve PPA and predictability.
• Collaborate with EDA vendors to adopt new physical‑implementation, sign‑off, power‑integrity and AI‑assisted technologies.

Required profile

• 15+ years of experience in physical design, backend implementation or CAD flow development for ASIC/SoC.
• Strong hands‑on expertise with RTL‑to‑GDS flows, timing sign‑off, multi‑corner multi‑mode closure and power‑grid design.
• Proven ability to improve PPA through methodology innovation, tool tuning and automation.
• Excellent communication skills and ability to influence cross‑functional teams.

Required skills

• Synthesis, floorplanning, placement, CTS, routing, optimization, extraction, timing closure, ECO, physical verification.
• Timing sign‑off, constraints, STA, SDC methodology, multi‑corner multi‑mode analysis.
• Power‑grid design, IR drop, EM analysis, low‑power, multi‑voltage, UPF flows.
• Scripting/automation: Tcl, Python, Perl, shell.
• EDA tools: Synopsys, Cadence, Siemens EDA (or equivalents).