IC Verification Engineer – ASIC Validation

About the role

The IC Verification Engineer will lead the definition and execution of verification concepts for ASIC projects, ensuring functional correctness and compliance with system requirements. You will collaborate closely with cross‑disciplinary developers and the ASIC supplier throughout the development lifecycle.

Key responsibilities

• Collect, discuss, and evaluate requirements for IC test and validation concepts in cooperation with other discipline developers.
• Define and specify IC validation characteristics, interfaces, and verification strategies (SystemVerilog, UVM, C‑driven, etc.).
• Develop verification environments, testbenches, and sequences, and judge simulation/design results against system requirements.
• Plan project schedules, track validation progress, perform bench tests, and maintain development documentation.
• Communicate technical details with the ASIC supplier and approve simulation outcomes.

Required profile

• 6–12 years of experience in ASIC/IC verification and validation.
• Master’s or Bachelor’s degree in Electrical Engineering, Microelectronics, VLSI design, or a related field.
• Experience with functional safety standards (ISO26262) and security/privacy engineering (UNECE WP29).

Required skills

• SystemVerilog and UVM methodology.
• C‑driven testbench development.
• ASIC verification, simulation, and functional verification.
• Analog, digital, and mixed‑signal verification techniques.
• Test automation tools and configuration management.
• Quality assurance and risk management processes.