Lead/Staff Engineer – Synthesis & Low Power Implementation

About the role

Qualcomm is seeking a Lead/Staff Engineer to drive synthesis and low‑power implementation for power‑complex System‑on‑Chip (SoC) designs. The role focuses on delivering power‑aware, multi‑voltage solutions while balancing performance, area, and verification priorities.

Key responsibilities

• Perform synthesis and low‑power bring‑up for complex SoC power domains.
• Identify and resolve pre‑layout timing challenges and provide constraint feedback.
• Qualify low‑power netlists at flat and subsystem levels, both pre‑ and post‑layout.
• Collaborate closely with DFT teams to enable MBIST and scan insertion.
• Work with Physical Design to address low‑power implementation issues and apply fixes.
• Develop and maintain automation scripts (TCL, Perl, Python, shell) to streamline flows.
• Support design data management using Perforce and ClearCase.
• Conduct logical equivalence checks between RTL, netlist, and subsequent netlist versions.
• Mentor junior engineers on timing flows and methodology.

Required profile

• Bachelor’s (3+ years), Master’s (2+ years) or PhD (1+ year) in Computer Science, Electrical/Electronics Engineering or related field.
• Minimum 7 years of hardware engineering experience, preferably in semiconductor or telecom domains.
• Strong knowledge of physical‑aware and power‑aware synthesis techniques, multi‑voltage designs, and low‑node timing derating.
• Experience mentoring junior engineers and collaborating across design, DFT, and physical design teams.

Required skills

• Synthesis and low‑power implementation
• Multi‑voltage and power‑aware design
• Timing analysis and derating
• TCL, Perl, Python, Shell scripting
• Perforce and ClearCase version control
• Logical equivalence checking
• DFT, MBIST, scan insertion
• Collaboration with Physical Design teams