Automotive High-Speed Hardware Design Engineer

About the role

Join Bosch Global Software Technologies as an Automotive High‑Speed Hardware Design Engineer. You will lead the design and development of ADAS, cockpit and connectivity ECUs, delivering high‑performance, safety‑critical hardware for next‑generation vehicles.

Key responsibilities

• Lead hardware design from concept to production for ADAS, cockpit and connectivity ECUs.
• Design high‑speed digital boards using advanced SoCs, DDR4/DDR5, LPDDR, PCIe, Ethernet (RGMII/SGMII/RMII/10G), USB, MIPI CSI/DSI and SerDes.
• Perform schematic design, component selection and BOM optimization for automotive‑grade reliability.
• Conduct Signal Integrity (SI) and Power Integrity (PI) analysis for critical high‑speed signals.
• Support thermal design, power sequencing and collaborate with mechanical engineers.
• Ensure ASIL‑D compliance (ISO 26262) and participate in FMEA, FMEDA and safety reviews.
• Interface with camera, radar, LiDAR and sensor‑fusion modules to guarantee signal quality and timing.
• Work with PCB layout engineers on impedance, stack‑up, crosstalk and EMI/EMC constraints.
• Drive hardware validation, board‑level testing, debugging and root‑cause analysis.
• Collaborate across system, software, validation, manufacturing and EMC teams through design verification and PPAP stages.

Required profile

• Bachelor’s or Master’s degree in Electronics, Electrical Engineering or related field.
• 5–9 years of hands‑on automotive hardware design experience.
• Proven experience with SoC‑based board design (e.g., NVIDIA, Qualcomm, Renesas, TI, NXP, Infineon AURIX).
• Strong knowledge of ADAS, cockpit and IVI architectures.

Required skills

• High‑speed design: DDR4/5, PCIe, MIPI, Ethernet, USB 3.x, LVDS, SerDes.
• SI/PI analysis tools: HyperLynx, Sigrity, Ansys, Cadence.
• Automotive safety standards: ISO 26262 (ASIL B‑D).
• EMI/EMC standards: CISPR 25, ISO 11452.
• Schematic capture tools: Altium, Cadence Allegro, Mentor DxDesigner, Zuken CR80.
• Thermal design, power distribution and sequencing.