Senior IP/SoC Design Engineer

About the role

Qualcomm India is seeking a Senior IP/SoC Design Engineer to lead the development of high‑performance system‑on‑chip solutions. The role involves working on micro‑architecture, interconnect protocols, and verification to deliver silicon for next‑generation devices.

Key responsibilities

• Design and develop IP blocks and SoC micro‑architecture.
• Implement and verify interconnect protocols such as CHI, AHB, AXI, ACE, ACE‑Lite, and NoC.
• Write and maintain Verilog RTL code for SoC components.
• Collaborate on multi‑core ARMv8/v9 CPU architecture, coherency and virtualization features.
• Perform synthesis using Synopsys Design Compiler, including DC/DCG flows, and ensure timing closure.
• Lead DFT, formal verification, silicon debug, and lint/CDC checks.
• Manage SoC dependencies, plan front‑end tasks, and track project milestones across design, verification, and physical implementation.

Required profile

• Bachelor’s degree in Computer Science, Electrical/Electronics Engineering or related field (Master’s or PhD preferred).
• 2–8+ years of experience in IP/SoC design and micro‑architecture.
• Proven ability to lead design convergence from architecture to silicon.

Required skills

• IP/SoC design and micro‑architecture.
• Interconnect protocols: CHI, AHB, AXI, ACE, ACE‑Lite, NoC.
• Digital design and RTL development.
• Verilog coding.
• ARMv8/v9 multi‑core CPU architecture, coherency protocols, virtualization.
• Synthesis with Synopsys Design Compiler, DC/DCG flow.
• Design for Test (DFT), formal verification, silicon debug.
• Lint, CDC, PLDRC, CLP tools.
• Timing closure and verification.